AMD Venice and San Diego next month


X-bit labs - Hardware news - Venice and San Diego Already around the Corner.
The first announcement stated that the current D0 revision will be replaced with the new E3 revision for the following CPUs that are the transition from Newcastle -> Venice that will start shipping April 4:
* Athlon 64 3000+ (ADA3000BIBOX) -> Athlon 64 3000+ (ADA3000BPBOX);
* Athlon 64 3200+ (ADA3200BIBOX) -> Athlon 64 3200+ (ADA3200BPBOX);
* Athlon 64 3500+ (ADA3500BIBOX) -> Athlon 64 3500+ (ADA3500BPBOX).
Here I would like to stress that this core stepping used to be called E0? by many sources, although AMD decided to stay with E3 index. The idea of this core stepping remains the same independent of the name: new CPUs on Venice core with 512MB L2 cache will acquire SSE3 support and enhanced memory controller, and the most important thing will be much higher frequency potential.
Then on April 15, we have a Athlon 4200+ (the renamed FX line) that is codenamed San Diego that is like Venice but has a 1MB cache instead of 512MB.
These will all ship in mid April.